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Cellphones Technology News

Samsung To Ship Chip Package With Phase-Change Memory 57

Posted by timothy from the going-through-a-phase dept.
angry tapir writes "Samsung Electronics will ship a multichip package later this quarter for smartphones that will include phase-change memory (PCM), an emerging technology that could ultimately replace memory types like NOR flash. Samsung's announcement is significant because it marks the first PCM product to be available as part of a multichip package. PCM uses a glass-like material that can change from multiple states to crystalline forms as its atoms are rearranged."
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Samsung To Ship Chip Package With Phase-Change Memory More

Samsung To Ship Chip Package With Phase-Change Memory

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  • I had a quick look at the Wikipedia [wikipedia.org] article on this memory (also known as PRAM) and didn't see anything about its performance relative to flash memory. Does anyone know what that's like? I imagine it's probably faster. It also has a longer lifespan.

    • Re:Performance? (Score:5, Informative)

      by ibsteve2u ( 1184603 ) on Thursday April 29, 2010 @04:04PM (#32036904)
      Does this answer your question? [numonyx.com]

      Read Speed

      Like RAM and NOR-type flash, the technology features fast random access times. This enables the execution of code directly from the memory, without an intermediate copy to RAM. The read latency of PCM is comparable to single bit per cell NOR flash, while the read bandwidth can match DRAM. In contrast, NAND flash suffers from long random access times on the order of 10s of microseconds that prevent direct code execution.

      Write/erase speed

      PCM is capable of achieving write speeds like NAND, but with lower latency and with no separate erase step required. NOR flash features moderate write speeds but long erase times. As with RAM, no separate erase step is required with PCM, but the write speed (bandwidth and latency) does not match the capability of RAM today. The capability of PCM is expected, however, however, to improve with each process generation as the PCM cell area decreases.

      • Re: (Score:2)

        by migla ( 1099771 )

        Pretend you're explaining this to an average person and then do that.

        Extra question: Will this affect battery life?

        • Re: (Score:3, Informative)

          by Amouth ( 879122 )

          ok - it is going to have the same seek time as a CF card but the read speed of your normal RAM - the write speed will be faster than your CF but slower than your normal RAM

          as for Battery life - zero fucking clue

        • Re: (Score:1, Interesting)

          by Anonymous Coward

          Pretend you're explaining this to an average person and then do that.

          Okay. . .

          Do you think it's going to rain Saturday?

          People enjoy hanging out with me, because I know better than to bore people to death with irrelevant tech stuff, but since this is Slashdot, I'll pick a middle ground. . .

          It's a lot like flash, but fast enough that it can be used to store programs and other things that aren't changed often, currently with flash those programs need to be copied to RAM before they are run, so replacing flash with PCM could allow you to get the same performance with les

          • Re: (Score:2)

            by Khyber ( 864651 )

            Actually the energy required to change a crystalline state is far more than what is required to just keep refreshing a bit in silicon.

            However, the write/read cycle lifetime of this tech pretty much means this stuff should be used as hard disk stuff. 10^8 W/R for PCM is much better than the typical 10^6 of NAND and NOR.

      • Re:Performance? (Score:4, Informative)

        by Bobb9000 ( 796960 ) on Thursday April 29, 2010 @05:00PM (#32037684)
        Phase change memory has some advantages, but for now and the foreseeable future it can't beat NAND in terms of cell size and price. NAND flash isn't going anywhere anytime soon. NOR, on the other hand, might get phased out in favor of this tech.

        • Re:Performance? (Score:4, Informative)

          by networkBoy ( 774728 ) on Thursday April 29, 2010 @07:43PM (#32039238) Journal

          yes, but NAND is sloooow compared to NOR for reads. NOR memory (and PCM) looks like a SRAM to your system, thus you can execute directly out of it. NAND is awkward in its structure, so you can not execute directly out of it, instead you must copy the contents of the flash device to RAM.

          Practical implications? If your device uses NOR or PCM you can use less DRAM in your design, if you use NAND then you need to increase the amount of RAM, often by as much as the size of the NAND memory (for smaller designs, larger ones will page memory from NAND)

        • Re: (Score:2)

          by Khyber ( 864651 )

          "Phase change memory has some advantages, but for now and the foreseeable future it can't beat NAND in terms of cell size and price."

          But it'll beat most anything else in terms of read/write cycle lifetime, and it's non-volatile.

          And that alone makes it *FAR* superior.

  • Electrical load limit? (Score:2, Interesting)

    by Anonymous Coward

    [QUOTE]But unlike NOR, PCM consumes more energy as it requires more write cycles, for which it requires more electric currents, Wong said.[/QUOTE]

    I'm a new poster, so sorry I don't know how to quote.

    Does the quoted bit mean that there is an upper limit on how fast you can write to the chip? Or is the total electrical current pulled for max protocol speed lower than the failure point of the chips? Will this generate excess heat? I'd imagine small chips would heat up fast too, since the writes would be more c

    • You're asking if there is an upper limit on write speed? Name a device with no limit on write speed and I'll point you to several working perpetual-motion machines.

      • /dev/null ??? (Score:1, Funny)

        by Anonymous Coward

        > You're asking if there is an upper limit on write speed?
        > Name a device with no limit on write speed and I'll point you to several working perpetual-motion machines.
         
        /dev/null ???

    • I'm a new poster, so sorry I don't know how to quote.

      Standard html or xml style tags, that is, angle brackets. [angle left]quote[angle right]--quoted text--[angle left backslash]quote[angle right].

      You can bold, italicize, and link with html tags.

    • Re: (Score:3, Insightful)

      by dgatwood ( 11270 )

      Does the quoted bit mean that there is an upper limit on how fast you can write to the chip? Or is the total electrical current pulled for max protocol speed lower than the failure point of the chips? Will this generate excess heat? I'd imagine small chips would heat up fast too, since the writes would be more concentrated (lower memory bits to bits able to be written per second ratio.

      I think that this translates to "as your laptop gets older, the reduced capacity of your battery will be exacerbated by your

  • Just hope you never have to write a paper dealing with the storing of pulse-code modulated (PCM) signals into phase change memory (PCM).

  • cache for SSD? (Score:4, Interesting)

    by j1m+5n0w ( 749199 ) on Thursday April 29, 2010 @04:33PM (#32037314) Homepage Journal
    If PCM is faster but more expensive than traditional flash, it sounds like it might be useful to incorporate into SSDs as a cache, or alternatively as a separate partition to use as swap or to store the filesystem journal. Is there some reason why this wouldn't work (besides relative unavailability an expense at present)? Is PCM better able to deal with many erasure cycles (which is why SSDs aren't recommended for swap)?

    • Yes, because that's exactly what we need right now - more expensive SSD memory :)

    • So, hmm, basically we'd have a cache hierarchy like this?
      CPU Registers - CPU Cache - RAM - PCM SSD - NAND Flash SSD - HDD

      That's a whole lot of steps.

      • Re: (Score:1, Interesting)

        by Anonymous Coward

        Actually, you forgot one step:

        CPU Registers - CPU Cache, RAM - PCM - NAND Flash SSD - HDD - Cloud.

        Every cache level has an associated level of cost - being able to pick & choose which layers you want & which data belongs in which layer is a powerful option for tuning performance (I would love to have PCM for my boot partition & executables - written rarely, read & execute in place means that you can have almost instantaneous boot times).

    • Unfortunately, the fundamental nature of Flash will remain a bottleneck. The value of PCM is not in fixing the terrible performance of Flash based SSDs, but in their replacement all together. PCM is faster, 10-100 thousand times more durable, will scale smaller, and isn't crippled by Flash's block-erase semantics.

      What Flash based SSDs really need is non-volatile RAM for the controller, not cache. In this role, a capacitor would work just as well, and yet manufacturers are still too cheap to include those

    • I don't mean to be impertinent, or detract from your point in any way, but I have to ask the question of whether that would even be useful. As it is it only takes something like 3 or 4 X-25E's to saturate a SATA 6gb/sec link (as we discussed previously on /.). Would it really be very useful to have an even faster cache on the front?
      Naturally it'll eventually be useful, after we have faster links, but it just seems a little premature to be talking about PCM caches in front of an SSD (in front of a spinning-d

      • I was thinking more in terms of durability than performance. Traditional hard drives are still recommended for swap because they don't wear out quite so easily in write-heavy workloads.

        Performance may be better as well, though; just because it's possible to saturate a SATA link with multiple SSDS on one particular workload, doesn't mean that they're fast for every workload. For instance, you can't write to flash without zeroing out the surrounding chunks. It might be handy to have a place on the drive

    • No. SSDs are in fact recommended for swap. Thereis somewhat of a myth that an OS swapping to flash storage could destroy flash however it just does not happen. This is recommended by manufactuers and I recall Microsoft recommending this practice with Windows 7 also. Sophisticated wear-leveling algorithms asside, current flash write/erase cycle ceiling is rather high, over 2,000,000 writes for some SSDs. This means it would take decades to destroy a 64gb SSD at 100% maximum write speed 24/7/365 - a very unl

      • Re: (Score:3, Informative)

        by TheSync ( 5291 )

        over 2,000,000 writes for some SSDs.

        Writes for the entire drive, but most SLC NAND flash chips have a lifetime of 100,000 write cycles per physical sector, and MLC only survives 10,000 write cycles per physical sector. And most flash memory is going to MLC because of the much higher density.

  • PCM (Score:2)

    by hhawk ( 26580 )

    I remember the good old days when PCM meant pulse coded modulation.

  • This kind of advance paves the way for solid state unified RAM & storage where applications can execute in-place. This allows for near-instant sleeping of a OS and even snoozing of individual applications. Even more interesting is re-writable binary at runtime. Things like process migration for cloud/clustering would then become ultra-easy, as a application image could be moved in realtime to a different device and execution resume straight away. It boggles the mind what's possible.

    More importantly t

  • how many (Score:1, Funny)

    by Anonymous Coward

    How many packages does Chip ship when Chip ships chips?

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